Problem with Hora Hi-hats and Resetting sequencers

Confirmed - problem’s back

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It does however still work with my “old solution”"even at 30 BPM

afbeelding

So what have we learned… I have no idea :thinking:

I just made all the clock outputs triggers, by changing all 4 PW to 1 and all works without sample delay etc even at 30 BPM, so TURN THE CLOCK GATES INTO TRIGGERS :blush:

3XSampleDelaysToReset nodelay FIXED.vcv (2.1 KB)

I’ve been using in all my patches, (and it’s my template) 2 CLOCKED.

On the first Clock (master), its 3rd channel is set to DIV64 and is sent to its input RESET, just like your example.

I needed to do that for some modules I was using in V1 and I’ve kept that setup since.

Once in a while all I need to fix, is some modules the reset behavior. Much like the one we are trying to figure out.

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I took your patch (fixed) and only run it.

I’m sorry to report, it jumped to step 2 on the first reset :wink:

Did good on the 2nd and jumped back to 2 on the 3rd reset. :man_facepalming:

BTW

I’m running at 48kHz

You?

44.1

Could it be why we have different outcomes?

Could be but there are just to many variables , hold on I try 48kHz …yep it skipped the first one…I give up… :sob: and now it also skipped on 44.1. that’s all.

So a message to @Andre_M.

The patch that I posted “appears” to work, IF

  • you keep your BPM at 85
  • your AUDIO is set to 48kHz.

But also, if you want to use the manual reset button be sure to have the CLOCKED PW (specially the PW3) to full left 0 (_ 1 in the display)

:smiley:

I guess you’ll have to try it yourself.

Jay, could you do one more test make sure the BPM is a multiple of 10 so 10,20,30 etc and not 81 82 83 and use my FIXED patch to see if it ALWAYS jumps to step 1 at 48kHz ?

NVRM it just skipped a step at 110 BPM at 48 on my PC so this is not part of the solution.

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Eventho you said NVM, I’m reporting the test.

Using 3XSampleDelaysToReset nodelay FIXED.vcv
AUDIO set at 48kHz
On BPM multiples of 10
30BPM jumps to 2 every 2 cycles
40BPM jumps to 2 every 2 cycles
50BPM jumps to 2 every 2 cycles
60BPM jumps to 2 every 2 cycles
70BPM jumps to 2 every 2 cycles
80BPM jumps to 1 every 1 cycle*
90BPM jumps to 1 every 1 cycle*
100BPM jumps to 2 every 2 cycles
110BPM jumps to 2 every 2 cycles
120BPM jumps to 1 every 1 cycle*
130BPM jumps to 2 every 2 cycles +*
Ok I stopped at 130 because it displays the 2 problems now jumps to 2 and get stuck at 1*

This is so weird :scream:

*At those BPM, it’s ok for the reset, but something weird happens, and rarely. I had seen this before but forgotten about it. Sometimes it goes to 1 but stay on step 1 for 2 UP trigger count. Hard to reproduce as it only happens randomly it seems. But I saw it once in this test. (Wasn’t hard to reproduce for me at 130BPM)

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Thanks! I guess it works for your purposes, but in my case it just refuses to do what I want. It does exactly what it used to do without “Master Reset” involved. Which is weird, cause I have read the manual and it was promising. I think it could be useful for manual resets though

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Works like a charm… That’s so weird. Thank you!

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Yeah, I use it for manual resets only. Resets are tough and there are probably as many required solutions as there are module combinations.

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Yeah, haha. That’s not restricting at all. Thanks for investigating the problem! 3 samples is a weird number… maybe that’s the time needed for a clock to rise.

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So I was curious about why Yeager’s solution works and ran some tests.

Here’s the clock traces when the Clocked module resets itself

And here it doesn’t

LEGEND:

Blue line - /16

Green line - /4

Yellow line - *96, the maximum multiplication

So It looks like when receiving the reset from /16th, it resets all the lower resolutions, or higher resolutions, I should say. It makes the rising edge of them less steep. Or it could be that it resets the gate while it rises, but the time for it to fall is too small, so it hold the “middle” value for some time and then raises as expected. So there is a shelf somewhere. Either way it is clear that it delays the higher res clocks

I thought that behavior is what the Count Modula MASTER RESET was designed to improve. But, I could be wrong.

Right! That’s what I though after reading the manual. But it clearly doesn’t work as I want it to work. Maybe I was doing it wrong… I mean I could experiment with Master Reset further, but this solution is simple and elegant, I really like it

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