I’m on a kick lately of figuring out how to make important modular synth components, like sequencers and binary counters, out of logic gates. I have a sort-of working design for a set/reset flip-flop.
As you can see in the video, it starts out in a mutual oscillation at Nyquist frequency, because each NAND gate is turning the other on and off every other audio sample.
Even after you fix this with an input pulse, if your pulse is only one sample long, you get back into the Nyquist mess.
Please, no spoilers! I’m having fun working through the problems. And that’s my main point today. I was able to diagnose these problems by creating a spreadsheet that accounts for the gate delays and mutual feedback of the NAND gates. Here you can see an example of reproducing the Nyquist crash after a one-sample pulse to the SET input:
The key insight is highlighted in orange: there is a sample where both NAND gate outputs output a high value at the same sample. Instant crash!
I wanted to share this idea with other VCV Rack developers, or anyone who wants to dive deep into digital logic design, like you’re back in college with a breadboard and wires again! Try using a spreadsheet to debug fast logic transitions.
In my case, I’m using 1 to represent 10V (true) and 0 to represent 0V (false). You can do all the logic functions with simple formulas. I know spreadsheets support boolean operations, but I want to look at 0 and 1, not FALSE and TRUE.
So if you want NOT(x), use 1-x.
If you want NAND(A,B) use 1-(A*B).
Each row of your spreadsheet represents one audio sample. The inputs for each logic gate must be references to the previous row, not the current row. This makes the simulation accurate for VCV Rack one-sample-per-gate-delay timing.
If you pick two columns* and output them as a .csv file (as spreadsheets usually do), then you can read them with Memory or MemoryCV and play them back out within Rack.
Since you’re having fun doing a known thing with low-level components, I think making music by typing sample values into a .csv file is the next level.
Update on my design: I have decided that the input pulses need to be held high much longer than a single sample, but a standard 1ms trigger pulse is about 0.001*48000 = 48 samples long. That’s plenty of time for transitory logic to settle down. I used Count Modula’s “gate to trigger” module because it handles the timing of converting a gate’s rising edge to a 1ms trigger pulse. I thought about using VCV Gates, but it comes with toggle flip-flops built in; so it would be silly to use it to build a flip flop!
I also added initialization logic using a NOR gate, so the oscillation no longer happens. When both outputs are LOW, the NOR goes high and triggers a reset.
I think for safety, I’m going to add more logic so that the outputs of the flip-flops protect the outside world from both values being 1 or 0 at the same time.
Loving this series of posts lately. I have been eschewing sequencers for my drums lately and just using logic. Logic doesn’t get out of sync with the main clock like most sequencers do. Sure you may lose a sample or 3 but you can jiggle that with delay or sample hold. And of course, xor can be surprising rhythmically sometimes. The reset flip flop is a cool project, I wonder how force this into a pulse oscillator with logic?
I don’t want to stray too far from the original topic, but now I have a mostly-working 8-step sequencer based mostly on VCV Logic gates. I got the toggle flip flop working. Then I chained 3 together to make a binary counter. I feed the 3 bits through 8 parallel logic groups that detect each of the 8 counter values.
The spreadsheet debugging technique got me unstuck with the SR flip flop, and I got the rest of the way pretty quickly. You can download the patch here.
I hope posting this inspires any developer who is on the fence about making a custom sequencer module. You can prototype things quite flexibly in VCV Rack. Make a humongous patch, play with it until it’s exactly what you want. Freeze that as your prototype, then make a module that works exactly the same way.
Years ago a girl constructed a working CPU in VCV Rack. I don’t remember her name but I will dig through my old files and try to find it. The patch was beyond impressive
I love that! The patch is surprisingly small for a fully functioning CPU. I love using 5-channel polyphony as a 5-bit bus for the tiny instruction words!
