How to 'sync' master clock / euclidean sequencer / sequence

In the attached video, you will see that there is a lag or something where the notes aren’t playing clearly, there are artifacts or bleeding or lag or whatever. Presumably this is a gate timing issue because the clock is advancing the note sequence rapidly and the timing is not ‘crisp’ with the value coming out of ADDR-SEQ. Thoughts?

I swear I just read something about this recently where someone posted a tip on something like this but I can’t find it.

Reset in count modula modules works differently. You probably need sync tool from rcm to get things right.

thanks. i think i’m close to working it out. just need to get ENV but that is for another day

actually this seems to work as well