I cannot get the VCV SEQ 3 sequencer to act as I would expect it to, and would appreciate ideas for how to do this.
I expected that I could use the horizontal row of buttons to disable / omit some of the eight steps. But those buttons only disable / omit the trigger pulses. And trigger pulses do not make the following VCV ADSR EG operate as required - it is necessary to use the STEPS o/p in conjunction with RETR to get VCV ADSR EG to do it’s stuff fully. And the VCV SEQ 3’s horizontal row of buttons does not omit STEPS steps, only TRIG steps.
Normally the TRIG output emits a 1 millisecond pulse when advancing to a step with an enabled trigger. Some hardware sequencers instead pass the external clock gate (however long it may be) through to the TRIG output if the step’s trigger is enabled. This behavior can be enabled by right-clicking the panel and clicking “Clock passthrough”. When using the internal clock with this mode enabled, the TRIG output emits a gate with a 50% duty cycle.
Probably not what you want to hear, but you have figured out the behavior - the buttons only control whether triggers are sent to the TRIG output - they do not cause steps to be skipped. SEQ 3 does not have a function to cause a step to be skipped and advance to the next step. You can only skip steps at the end by reducing the number of steps, or by sending a trigger to the RESET input. You cannot skip steps in the middle (at least not by using any functionality built into SEQ 3).
Unfortunately the SEQ 3 documentation does not fully describe all the functionality, so it is not surprising you are having some problems and misunderstanding. For years it did not have any documentation at all, so incomplete is better than nothing.
Before there was any documentation at all, I did extensive experimentation with SEQ 3, and developed some unofficial documentation that is much more complete than the current official manual. I can’t promise that nothing has changed since I wrote that documentation, but I think it will give you a much better understanding.
Though you can’t cause an internal step to be actually skipped, you can fake it out by making the “skipped” step extremely short. I see you are using the SEQ 3 internal clock. I know of two simple choices to fake it out using the internal clock.
If you can sacrifice one of the CV outputs (say CV3), then you can set CV3 to zero for most of the steps. For steps you want to skip, set CV3 to 10V. Then patch CV3 output to the Tempo CV input, and set the attenuator to 100%. The clock will be 2^10 faster for “skipped” steps, virtually instantaneous. So the “skipped” step is actually firing, but you will never hear it. As Jens indicated, you will want to enable “clock passthrough” in the context menu so you can use the ADSR more effectively.
In the example below I am “skipping” steps 2 and 6.
If you require CV3, then you can use the step gate outputs instead. Each gate is 10V when the step is active. So patch the “skipped” gates to a MIX at 100%, and then patch the MIX output to the Tempo CV input with attenuator at 100%.
Just as before, the example below “skips” steps 2 and 6.
oh, and the “steps” output is used to link seq3 modules together, ensuring the follower(s) have the same number of steps (1-8) as set on the leader module.
the “trig” output is related to the led’s on steps 1-8 (and the rightclick menu “send clock” option).
another tip, is to use clock passtrough, but without using the internal tempo - connecting an lfo with variable pulse width to the input - you can then modulate the gate-length on the “trig” outputs that way - and use more or less than 50% duty cycle. sending shorter or longer gates to adsr’s can have great effect on their envelope output.
